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<article article-type="research-article" dtd-version="1.3" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xml:lang="ru"><front><journal-meta><journal-id journal-id-type="publisher-id">mateltech</journal-id><journal-title-group><journal-title xml:lang="ru">Известия высших учебных заведений. Материалы электронной техники</journal-title><trans-title-group xml:lang="en"><trans-title>Izvestiya Vysshikh Uchebnykh Zavedenii. Materialy Elektronnoi Tekhniki = Materials of Electronics Engineering</trans-title></trans-title-group></journal-title-group><issn pub-type="ppub">1609-3577</issn><issn pub-type="epub">2413-6387</issn><publisher><publisher-name>MISIS</publisher-name></publisher></journal-meta><article-meta><article-id pub-id-type="doi">10.17073/1609-3577-2022-4-298-304</article-id><article-id custom-type="edn" pub-id-type="custom">OVSYUI</article-id><article-id custom-type="elpub" pub-id-type="custom">mateltech-500</article-id><article-categories><subj-group subj-group-type="heading"><subject>Research Article</subject></subj-group><subj-group subj-group-type="section-heading" xml:lang="ru"><subject>Математическое моделирование в материаловедении электронных компонентов</subject></subj-group><subj-group subj-group-type="section-heading" xml:lang="en"><subject>MATHEMATICAL MODELING IN MATERIALS SCIENCE OF ELECTRONIC COMPONENTS</subject></subj-group></article-categories><title-group><article-title>Отказоустойчивые самосинхронные схемы</article-title><trans-title-group xml:lang="en"><trans-title>Fault-tolerant selt-timed circuits</trans-title></trans-title-group></title-group><contrib-group><contrib contrib-type="author" corresp="yes"><contrib-id contrib-id-type="orcid">https://orcid.org/0000-0002-8872-2774</contrib-id><name-alternatives><name name-style="eastern" xml:lang="ru"><surname>Зацаринный</surname><given-names>А. А.</given-names></name><name name-style="western" xml:lang="en"><surname>Zatsarinny</surname><given-names>A. A.</given-names></name></name-alternatives><bio xml:lang="ru"><p>ул. Вавилова, д. 44, корп. 2, Москва, 119333</p><p>Зацаринный Александр Алексеевич — доктор техн. наук, главный научный сотрудник</p></bio><bio xml:lang="en"><p>44-2 Vavilova Str., Moscow 119333</p><p>Alexandеr A. Zatsarinny — Dr. Sci. (Eng.), Chief Researcher</p></bio><email xlink:type="simple">AZatsarinny@ipiran.ru</email><xref ref-type="aff" rid="aff-1"/></contrib><contrib contrib-type="author" corresp="yes"><contrib-id contrib-id-type="orcid">https://orcid.org/0000-0003-4784-7519</contrib-id><name-alternatives><name name-style="eastern" xml:lang="ru"><surname>Степченков</surname><given-names>Ю. А.</given-names></name><name name-style="western" xml:lang="en"><surname>Stepchenkov</surname><given-names>Yu. A.</given-names></name></name-alternatives><bio xml:lang="ru"><p>ул. Вавилова, д. 44, корп. 2, Москва, 119333</p><p>Степченков Юрий Афанасьевич — канд. техн. наук, руководитель отдела</p></bio><bio xml:lang="en"><p>44-2 Vavilova Str., Moscow 119333</p><p>Yury A. Stepchenkov — Cand. Sci. (Eng.), Head of Department</p></bio><email xlink:type="simple">YStepchenkov@ipiran.ru</email><xref ref-type="aff" rid="aff-1"/></contrib><contrib contrib-type="author" corresp="yes"><contrib-id contrib-id-type="orcid">https://orcid.org/0000-0003-0212-4931</contrib-id><name-alternatives><name name-style="eastern" xml:lang="ru"><surname>Дьяченко</surname><given-names>Ю. Г.</given-names></name><name name-style="western" xml:lang="en"><surname>Diachenko</surname><given-names>Yu. G.</given-names></name></name-alternatives><bio xml:lang="ru"><p>ул. Вавилова, д. 44, корп. 2, Москва, 119333</p><p>Дьяченко Юрий Георгиевич — канд. техн. наук, старший научный сотрудник</p></bio><bio xml:lang="en"><p>44-2 Vavilova Str., Moscow 119333</p><p>Yury G. Diachenko — Cand. Sci. (Eng.), Senior Researcher</p></bio><email xlink:type="simple">diaura@mai.ru</email><xref ref-type="aff" rid="aff-1"/></contrib><contrib contrib-type="author" corresp="yes"><name-alternatives><name name-style="eastern" xml:lang="ru"><surname>Рождественский</surname><given-names>Ю. В.</given-names></name><name name-style="western" xml:lang="en"><surname>Rogdestvenski</surname><given-names>Yu. V.</given-names></name></name-alternatives><bio xml:lang="ru"><p>ул. Вавилова, д. 44, корп. 2, Москва, 119333</p><p>Рождественский Юрий Владимирович — канд. техн. наук, ведущий научный сотрудник</p></bio><bio xml:lang="en"><p>44-2 Vavilova Str., Moscow 119333</p><p>Yury V. Rogdestvenski — Cand. Sci. (Eng.), Leading Researcher</p></bio><email xlink:type="simple">YRogdest@ipiran.ru</email><xref ref-type="aff" rid="aff-1"/></contrib><contrib contrib-type="author" corresp="yes"><name-alternatives><name name-style="eastern" xml:lang="ru"><surname>Плеханов</surname><given-names>Л. П.</given-names></name><name name-style="western" xml:lang="en"><surname>Plekhanov</surname><given-names>L. P.</given-names></name></name-alternatives><bio xml:lang="ru"><p>ул. Вавилова, д. 44, корп. 2, Москва, 119333</p><p>Плеханов Леонид Петрович — канд. техн. наук, старший научный сотрудник</p></bio><bio xml:lang="en"><p>44-2 Vavilova Str., Moscow 119333</p><p>Leonid P. Plekhanov — Cand. Sci. (Eng.), Senior Researcher</p></bio><email xlink:type="simple">lplekhanov@inbox.ru</email><xref ref-type="aff" rid="aff-1"/></contrib></contrib-group><aff-alternatives id="aff-1"><aff xml:lang="ru"><institution>Федеральный исследовательский центр «Информатика и управление» Российской академии наук</institution><country>Россия</country></aff><aff xml:lang="en"><institution>Federal Research Center “Computer Science and Control” of the Russian Academy of Sciences</institution><country>Russian Federation</country></aff></aff-alternatives><pub-date pub-type="collection"><year>2022</year></pub-date><pub-date pub-type="epub"><day>10</day><month>01</month><year>2023</year></pub-date><volume>25</volume><issue>4</issue><fpage>298</fpage><lpage>304</lpage><permissions><copyright-statement>Copyright &amp;#x00A9; Зацаринный А.А., Степченков Ю.А., Дьяченко Ю.Г., Рождественский Ю.В., Плеханов Л.П., 2023</copyright-statement><copyright-year>2023</copyright-year><copyright-holder xml:lang="ru">Зацаринный А.А., Степченков Ю.А., Дьяченко Ю.Г., Рождественский Ю.В., Плеханов Л.П.</copyright-holder><copyright-holder xml:lang="en">Zatsarinny A.A., Stepchenkov Y.A., Diachenko Y.G., Rogdestvenski Y.V., Plekhanov L.P.</copyright-holder><license xml:lang="ru" license-type="creative-commons-attribution" xlink:href="https://creativecommons.org/licenses/by/4.0/" xlink:type="simple"><license-p>Данная работа распространяется под лицензией Creative Commons Attribution 4.0.</license-p></license><license xml:lang="en" license-type="creative-commons-attribution" xlink:href="https://creativecommons.org/licenses/by/4.0/" xlink:type="simple"><license-p>This work is licensed under a Creative Commons Attribution 4.0 License.</license-p></license></permissions><self-uri xlink:href="https://met.misis.ru/jour/article/view/500">https://met.misis.ru/jour/article/view/500</self-uri><abstract><p>Статья исследует проблему создания отказоустойчивых самосинхронных (СС) схем. Использование избыточного СС-кодирования и двухфазной дисциплины работы обеспечивает более высокую сбоеустойчивость СС-схем в сравнении с синхронными аналогами. Использование дублирования канала обработки данных вместо традиционного для синхронных схем троирования позволяет сократить избыточность СС-схем в отказоустойчивом исполнении и обеспечивает более высокий уровень надежности в сравнении с синхронными аналогами.</p></abstract><trans-abstract xml:lang="en"><p>The article considers the problem of developing synchronous and self-timed (ST) circuits that are tolerant to faults. Redundant ST coding and two-phase discipline ensures that ST circuits are more soft error tolerant than synchronous counterparts. Duplicating ST channels instead of tripling reduces the fault-tolerant ST circuits’ redundancy and retains their reliability level compared to synchronous counterparts.</p></trans-abstract><kwd-group xml:lang="ru"><kwd>самосинхронные схемы</kwd><kwd>логический сбой</kwd><kwd>отказ</kwd><kwd>отказоустойчивость</kwd><kwd>парафазный сигнал</kwd><kwd>индикация</kwd></kwd-group><kwd-group xml:lang="en"><kwd>self-timed circuits</kwd><kwd>soft error</kwd><kwd>fault</kwd><kwd>voting</kwd><kwd>dual-rail signal</kwd><kwd>indication</kwd></kwd-group></article-meta></front><back><ref-list><title>References</title><ref id="cit1"><label>1</label><citation-alternatives><mixed-citation xml:lang="ru">Викторова В.C., Лубков Н.В., Степанянц А.С. Анализ надежности отказоустойчивых управляющих вычислительных систем. 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