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Quantum conductance staircase of holes in silicon nanosandwiches

https://doi.org/10.17073/1609-3577-2017-2-81-98

Abstract

The results of studying the quantum conductance staircase of holes in one−dimensional channels obtained by the split−gate method inside silicon nanosandwiches that are the ultra−narrow quantum well confined by the delta barriers heavily doped with boron on the n−type Si (100) surface are reported. Since the silicon quantum wells studied are ultra−narrow (~2 nm) and confined by the delta barriers that consist of the negative−U dipole boron centers, the quantized conductance of one−dimensional channels is observed at relatively high temperatures (T > 77 K). Further, the current−voltage characteristic of the quantum conductance staircase is studied in relation to the kinetic energy of holes and their sheet density in the quantum wells. The results show that the quantum conductance staircase of holes in p−Si quantum wires is caused by independent contributions of the one−dimensional (1D) subbands of the heavy and light holes; these contributions manifest themselves in the study of square−section quantum wires in the doubling of the quantum−step height (G0 = 4e2/h), except for the first step (G0 = 2e2/h) due to the absence of degeneracy of the lower 1D subband. An analysis of the heights of the first and second quantum steps indicates that there is a spontaneous spin polarization of the heavy and light holes, which emphasizes the very important role of exchange interaction in the processes of 1D transport of individual charge carriers. In addition, the field−related inhibition of the quantum conductance staircase is demonstrated in the situation when the energy of the field−induced heating of the carriers become comparable to the energy gap between the 1D subbands. The use of the split−gate method made it possible to detect the effect of a drastic increase in the height of the quantum conductance steps when the kinetic energy of holes is increased; this effect is most profound for quantum wires of finite length, which are not described under conditions of a quantum point contact. In the concluding section of this paper we present the findings for the quantum conductance staircase of holes that is caused by the edge channels in the silicon nanosandwiches prepared within frameworks of the Hall. This longitudinal quantum conductance staircase, Gxx, is revealed by the voltage applied to the Hall contacts, Vxy, to a maximum of 4e2/h. In addition to the standard plateau, 2e2/h, the variations of the Vxy voltage appear to exhibit the fractional forms of the quantum conductance staircase with the plateaus and steps that bring into correlation respectively with the odd and even fractional values.

About the Authors

N. T. Bagraev
Peter the Great Saint−Petersburg Polytechnic University; Ioffe Institute
Russian Federation

Dr. Sci. (Phys.−Math.), Leading Researcher

Professor, Department of Experimental Physics 



L. E. Klyachkin
Peter the Great Saint−Petersburg Polytechnic University; Ioffe Institute
Russian Federation

Cand. Sci. (Phys.−Math.), Senior Researcher 

Associate Professor, Department of Experimental Physics



A. M. Malyarenko
Ioffe Institute
Russian Federation
Cand. Sci. (Phys.−Math.), Senior Researcher


V. S. Khromov
Ioffe Institute
Russian Federation
Research Intern


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Bagraev N.T., Klyachkin L.E., Malyarenko A.M., Khromov V.S. Quantum conductance staircase of holes in silicon nanosandwiches. Izvestiya Vysshikh Uchebnykh Zavedenii. Materialy Elektronnoi Tekhniki = Materials of Electronics Engineering. 2017;20(2):81-98. (In Russ.) https://doi.org/10.17073/1609-3577-2017-2-81-98

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