Tilt Boundary Formation in GeSi/Si (001) Vicinal Heterosystem
https://doi.org/10.17073/1609-3577-2014-2-148-151
Abstract
The structural state of GexSi1−x films grown on Si substrates with the vicinal orientation (1 1 13) has been studied. The (1 1 13) orientation has been obtained by rotating the singular plane (001) around the [11−0] axis. The x parameter of GexSi1−x films in different samples ranged from 0.083 to 0.268. Triclinic distortions arising in film crystal lattice have been analyzed using our technique developed for the determination of epitaxial layer structural parameters based on the X−ray diffractometry data. It has been established that during the epitaxial process the film lattice turns around the direction of surface steps due to the introduction of misfit dislocations into the interface. Dislocations with Burgers vector a/2<110> which is not parallel to the interface create an analog of a tilt boundary. The turning angle value ψ is proportional to the misfit dislocation density. This phenomenon is associated with a decrease of the interface symmetry that leads to a change in the efficiency of stress relieving by dislocations belonging to different families. The influence of these families on the low−angle boundary formation is considered. Experimental values of the ψ angle and shear strain for the [13 13 2−] and [1−10] directions lying in the interface (1 1 13) have been defined. A comparison of the experimental and calculated values of ψ for the [13 13 2−] direction is provided.
About the Authors
A. V. KolesnikovRussian Federation
Cand. Sci. (Phys.–Math.), Senior Researcher
E. M. Trukhanov
Russian Federation
Dr. Sci. (Phys.–Math.), Leading Researcher
A. S. Ilin
Russian Federation
Engineer
I. D. Loshkarev
Russian Federation
Cand. Sci. (Phys.–Math.), Junior Researcher
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Review
For citations:
Kolesnikov A.V., Trukhanov E.M., Ilin A.S., Loshkarev I.D. Tilt Boundary Formation in GeSi/Si (001) Vicinal Heterosystem. Izvestiya Vysshikh Uchebnykh Zavedenii. Materialy Elektronnoi Tekhniki = Materials of Electronics Engineering. 2014;(2):148-151. (In Russ.) https://doi.org/10.17073/1609-3577-2014-2-148-151